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| Integrated Circuit Systems, Inc. ee / PCI-X Buffer Low Skew PCI Sh a General tDescription a The ICS9112-27 is a high performance, low skew, low jitter D clock driver. It is designed to distribute high . PCI / PCI-X w speed signals in PCI / PCI-X applications operating at speeds from 0 to 140 MHz. w wThe ICS9112-27 is characterized for operation from -40C to 85C for automotive and industrial applications. 4U t .c om ICS9112-27 Features * * * * * * Frequency range 0 - 140 MHz (3.3V) Less than 200 ps Jitter between outputs Skew controlled outputs < 100 ps Distribute one clock input to one bank of four outputs 3.3V 10% operation Available in 8 pin TSSOP, and SOIC packages. Block Diagram OE LOGIC CONTROL CLK0 CLK1 CLK_IN Pin Descriptions PIN NUMBER 1 2 3 4 5 6 7 8 0055G--04/26/05 w PIN NAME CLK_IN OE CLK0 GND CLK1 VDD CLK2 CLK3 w .D w TYPE IN IN OUT PWR OUT PWR OUT OUT t a CLK2 CLK3 S a e h t e CLK_IN OE 1 2 3 4 ICS9112-27 CLK0 U 4 Pin Configuration 8 7 6 5 CLK3 CLK2 VDD CLK1 .c m o GND 8 pin TSSOP & SOIC Functionality Table INPUTS CLK_IN 0 0 1 1 OE 0 1 0 1 OUTPUTS CLK(3:0) Tristate 0 Tristate 1 DESCRIPTION Input reference frequency. Output enable. When OE is low, it tristates the clock outputs Buffered clock output Ground Buffered clock output Power supply for 3.3V Buffered clock output Buffered clock output w w w .D a aS t ee h 4U t om .c ICS9112-27 Absolute Maximum Ratings Supply voltage range VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 4.3 V Input voltage rangeVI (see notes 1 & 2) . . . . . . . . -0.5V to VDD + 0.5V Output voltage range VO (see notes 1 & 2) . . . . . -0.5V to VDD + 0.5V Input clamp current IIK (VI< 0 or VI >VDD) . . . . . . . . . . . . . . . . 50 mA Output clamp current I OK (VO< 0 or VO) . . . . . . . . . . . . . . . . . 50 mA Continuous total output current, IO (V O = 0 to VDD) . . . . . . . . . 50 mA Package thermal impedance OJA (see note 3): PW package230.5C/W Storage temperature rante, T stg . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Notes: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 4.6 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51. Recommended Operating Conditions Min Supply voltage, VDD High-level input voltage, VIH Low-level input voltage, VIL Input voltage, VI High-level output current, IOH Low-level output current, IOL Operating free-air temperature, TA -40 0 3 0.7XVDD 0.3XVDD VDD -24 24 85 Nom 3.3 Max 3.6 Unit V V V V mA mA C Timing requirements over recommended ranges of supply voltage and operating free-air temperature Min Clock frequency fCLK 0 Nom Max 140 Unit MHz 0055G--04/26/05 2 ICS9112-27 Electrical Characteristics at 3.3V TA = -40 to 85C; Supply Voltage VDD = 3.3 V +/-10% (unless otherwise stated) PARAMETER Input voltage High-level Output Voltage SYMBOL V IK V OH CONDITIONS V DD = 3.3V, I I = -18 mA V DD = min to max, I OH = -1 mA V DD = 3V, I OH = -24 mA V DD = 3V, I OH = 12 mA V DD = min to max, I OH = 1 mA Low-level Output Voltage V OL V DD = 3V, I OH = 24 mA V DD = 3V, I OH = 12 mA High-level Input Current Low-level Input Current Input Current Dynamic Supply Current Input Capacitance1 Output Capacitance 1 MIN V DD - 0.2 2 2.4 TYP 3.3 2.3 2.7 0.022 0.61 0.31 -53 -54 MAX -1.2 UNITS V V 0.2 0.8 0.55 -40 mA mA 5 mA mA pF pF V I OH I OL II I DD CI CO V DD = 3V, V O = 1V V DD = 3.3V, VO = 1.65V V DD = 3V, V O = 2V V DD = 3.3V, VO = 1.65V V = V O or V DD Unloaded outputs at 66.67 MHz V DD = 3.3V, V I = 0V or 3.3V V DD = 3.3V, V I = 0V or 3.3V -5 40 53 57 13 3 3.2 37 1. Guaranteed by design, not 100% tested in production. Switching Characteristics at 3.3V TA = -40 to 0 85C; Supply Voltage VDD = 3.3 V +/-10% (For loading, see figures 1 and 2) PARAMETER High-to-low Propagation Delay Output Skew Window Process Skew 1 1 1 1 1 SYMBOL t PLH t PHL Tsk (o) Tsk (p) Tsk (pr) Thigh Tlow Tr Tf CONDITIONS V O = VDD/2 V O = VDD/2 V O = VDD/2 V O = VDD/2 V O = VDD/2 66 MHz 140 MHz 66 MHz 140 MHz 0.3 to 0.6 V DD 0.6 to 0.3 V DD MIN 1.8 1.8 TYP 3.1 2.9 50 MAX 3.8 3.8 100 300 500 UNITS ns ns ps ps ps ns ns Low-to-high Propagation Delay Pulse Skew = | t PLH - t PHL | CLKIN High Time1 CLKIN Low Time1 Output Rise Slew Rate1 Output Rise Slew Rate1 6 3 6 3 1.5 1.5 2.1 2.4 4 4 V/ns V/ns 1. Guaranteed by design, not 100% tested in production. 0055G--04/26/05 3 ICS9112-27 Parameter Measurement Information VDD 140W CLKn 10 pF 140W Figure 1. Test Load Circuit VDD 50% VDD CLKIN tPLH TPHL VOH 0V 0.6 VDD 50% VDD CLK0-CLK3 0.2 VDD tR 0.6 VDD 50% VDD 0.2 VDD tf VOL Figure 2. Voltage Thresholds for Propagation Delay (tpd) Measurements 50% VDD Any CLK 50% VDD Any CLK Tsk(0) Figure 3. Output Skew Paramameter VIH(Min) VIL(Max) Vtest Value 0.5 VDD 0.35 VDD 0.4 VDD Unit V V V VIH(Min) Vtest VIL(Max) thigh 0.6 VDD tcyc tlow 0.2 VDD Figure 4. Clock Waveform 0.4 VDD Peak to Peak (Minimum) Note: All parameters in Figure 4 are according to PCI-X 1.0 specifications. 0055G--04/26/05 4 ICS9112-27 ICS9112AG-27 SUPPLY CURRENT vs. FREQUENCY o VDD = 3.63 V, TA = 85 C 35 30 25 IDD (mA) 20 15 10 5 0 0 20 40 60 80 Frequency (MHz) 100 120 140 160 ICS9112AG-27 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT VDD = 3.3V, TA = 25 C 3.5 o 3.0 VOH - High-Level Output Current (mA) 2.5 2.0 1.5 1.0 0.5 0.0 -80 -70 -60 -50 -40 -30 IOH - High-Level Output Current (mA) -20 -10 0 0055G--04/26/05 5 ICS9112-27 ICS9112AG-27 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT o VDD = 3.3V, TA = 25 C 3.5 3.0 2.5 VOL - Low-Level Output Current (mA) 2.0 1.5 1.0 0.5 0.0 0 10 20 30 40 50 60 70 IOL - Low-Level Output Current (mA) 0055G--04/26/05 6 ICS9112-27 N c L E1 INDEX AREA E 12 D A2 A1 A 4.40 mm. Body, 0.65 mm. Pitch TSSOP (173 mil) (25.6 mil) In Millimeters In Inches SYMBOL COMMON DIMENSIONS COMMON DIMENSIONS MIN MAX MIN MAX A -1.20 -.047 A1 0.05 0.15 .002 .006 A2 0.80 1.05 .032 .041 b 0.19 0.30 .007 .012 c 0.09 0.20 .0035 .008 D SEE VARIATIONS SEE VARIATIONS E 6.40 BASIC 0.252 BASIC E1 4.30 4.50 .169 .177 e 0.65 BASIC 0.0256 BASIC L 0.45 0.75 .018 .030 N SEE VARIATIONS SEE VARIATIONS 0 8 0 8 aaa -0.10 -.004 VARIATIONS N 8 D mm. MIN 2.90 MAX 3.10 MIN .114 D (inch) MAX .122 -Ce b SEATING PLANE aaa C Reference Doc.: JEDEC Publication 95, MO-153 10-0035 4.40 mm. Body, 0.65 mm. pitch TSSOP (0.0256 Inch) (173 mil) Ordering Information ICS9112yG-27LF-T Example: ICS XXXX y G LF- T Designation for tape and reel packaging Annealed Lead Free (Optional) Package Type G = TSSOP Revision Designator (will not correlate with datasheet revision) Device Type Prefix ICS = Standard Device 0055G--04/26/05 7 ICS9112-27 N C L INDEX ARE A E H 12 D h x 45 A A1 150 mil (Narrow Body) SOIC In Millimeters In Inches SYMBOL COMMON DIMENSIONS COMMON DIMENSIONS MIN MAX MIN MAX A 1.35 1.75 .0532 .0688 A1 0.10 0.25 .0040 .0098 B 0.33 0.51 .013 .020 C 0.19 0.25 .0075 .0098 SEE VARIATIONS SEE VARIATIONS D E 3.80 4.00 .1497 .1574 1.27 BASIC 0.050 BASIC e H 5.80 6.20 .2284 .2440 h 0.25 0.50 .010 .020 L 0.40 1.27 .016 .050 SEE VARIATIONS SEE VARIATIONS N 0 8 0 8 VARIATIONS N 8 D mm. MIN 4.80 MAX 5.00 D (inch) MIN MAX .1890 .1968 e B SEATING PLANE .10 (.004) 150 mil (Narrow Body) SOIC 2 Reference Doc.: JEDEC Publication 95, MS-01 1 0-0030 Ordering Information ICS9112yM-27LF-T Example: ICS XXXX y M LF- T Designation for tape and reel packaging Annealed Lead Free (Optional) Package Type M = SOIC Revision Designator (will not correlate with datasheet revision) Device Type Prefix ICS = Standard Device 0055G--04/26/05 8 |
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